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AMD CEO to Negotiate 2nm, 3nm Chip Supplies With TSMC

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Lisa Su, AMD’s chief executive, and other company C-level execs plan to visit Taiwan in late September – early November to discuss collaboration with local partners. Among the companies, AMD’s management intends to meet are Taiwan Semiconductor Manufacturing Co., chip packaging specialists, and big PC makers.

Lisa Su plans to discuss future collaboration with TSMC’s chief executive CC Wei during her visit. Among the topics is the usage of TSMC’s ‘N3 Plus’ fabrication node (probably N3P) and N2 (2nm-class) manufacturing technology, reports DigiTimes (opens in new tab) citing sources with knowledge of the matter. In addition, the two companies’ chief executives will discuss plans for upcoming orders, which include technologies that are either available or set to become available in the short-term future.

AMD’s impressive success in recent years is enabled mainly by TSMC’s ability to produce chips in high volume using its highly competitive process technologies. To continue its spree of screaming success, AMD must ensure sufficient allocation at TSMC and early access to the foundry’s latest process design kits (PDK). TSMC will start volume production of chips on its N2 node sometime in the second half of 2025, so it is about time for AMD to start talking about the usage of N2 for its 2026 products and beyond.

(Image credit: TSMC)

In addition to advanced TSMC’s semiconductor manufacturing technologies, AMD’s future success will depend on advanced chip packaging technologies as the company (like other designers of chips) will extensively use multi-chiplet chip packaging technologies.


Lisa Su, AMD’s chief executive, and other company C-level execs plan to visit Taiwan in late September – early November to discuss collaboration with local partners. Among the companies, AMD’s management intends to meet are Taiwan Semiconductor Manufacturing Co., chip packaging specialists, and big PC makers.

Lisa Su plans to discuss future collaboration with TSMC’s chief executive CC Wei during her visit. Among the topics is the usage of TSMC’s ‘N3 Plus’ fabrication node (probably N3P) and N2 (2nm-class) manufacturing technology, reports DigiTimes (opens in new tab) citing sources with knowledge of the matter. In addition, the two companies’ chief executives will discuss plans for upcoming orders, which include technologies that are either available or set to become available in the short-term future.

AMD’s impressive success in recent years is enabled mainly by TSMC’s ability to produce chips in high volume using its highly competitive process technologies. To continue its spree of screaming success, AMD must ensure sufficient allocation at TSMC and early access to the foundry’s latest process design kits (PDK). TSMC will start volume production of chips on its N2 node sometime in the second half of 2025, so it is about time for AMD to start talking about the usage of N2 for its 2026 products and beyond.

(Image credit: TSMC)

In addition to advanced TSMC’s semiconductor manufacturing technologies, AMD’s future success will depend on advanced chip packaging technologies as the company (like other designers of chips) will extensively use multi-chiplet chip packaging technologies.

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