TSMC to Initiate 1.4nm Process Technology R&D
At processor manufacturers, fundamental and applied research and development work never stops, so now that Taiwan Semiconductor Manufacturing Co. has outlined a timeline for its N2 (2 nm-class) fabrication process that will enter high-volume manufacturing (HVM) in 2025, it is time for the company to start thinking about a succeeding node. If a new rumor is to be believed, TSMC is set to formally announce its 1.4 nm-class technology in June.
TSMC plans to reassign the team that developed its N3 (3 nm-class) node to development of its 1.4 nm-class fabrication process in June, reports Business Korea. Typically, foundries and chip designers never formally announce R&D milestones, so we are unlikely going to see a TSMC press release saying that development of its 1.4 nm technology had been started. Meanwhile, TSMC is set to host its Technology Symposium in mid-June and there the company may outline some brief details about the node that will succeed its N2 manufacturing process.
Standard process technology design flow includes pathfinding, research and development phases. Pathfinding involves things like fundamental exploration of materials and physics and in many cases, it is performed simultaneously for numerous nodes. By now, pathfinding for TSMC’s N2 has probably been concluded, so appropriate teams specializing in fundamental physics and chemistry are working on a successors for N2, which may well be called 1.4 nm, or 14 angstroms.
TSMC’s N2 relies on gate-all-around field-effect transistors (GAAFETs), but will use existing extreme ultraviolet (EUV) lithography with a 0.33 numerical aperture (0.33 NA). Given the details about TSMC’s N2 that we know today, it is possible that its successor will retain GAA transistors, but what really remains to be seen is whether it is going to move to EUV tools with a 0.55 NA (or High NA).
Keeping in mind that TSMC’s N2 enters HVM in late 2025 (so expect the first 2 nm chips from the company to be delivered around 2026) and TSMC’s two-and-a-half to three-year node introduction cadence, we can potentially expect TSMC’s 1.4 nm (or 14 angstroms) process to be used for commercial products starting in 2028. Given the timeframe, it will be beneficial for the node to use High NA lithography, which Intel plans to start using in 2025.
Speaking of Intel, it remains to be seen which of Intel’s node is set to compete against TSMC’s 1.4 nm. Intel is set to introduce its 18A (18 angstroms) technology in 2025, so by 2028 the company will roll out at least one new fabrication process. Whether it will be called 16A (since Intel seems to be cautious with node advancements these days) or 14A will be interesting to see.
At processor manufacturers, fundamental and applied research and development work never stops, so now that Taiwan Semiconductor Manufacturing Co. has outlined a timeline for its N2 (2 nm-class) fabrication process that will enter high-volume manufacturing (HVM) in 2025, it is time for the company to start thinking about a succeeding node. If a new rumor is to be believed, TSMC is set to formally announce its 1.4 nm-class technology in June.
TSMC plans to reassign the team that developed its N3 (3 nm-class) node to development of its 1.4 nm-class fabrication process in June, reports Business Korea. Typically, foundries and chip designers never formally announce R&D milestones, so we are unlikely going to see a TSMC press release saying that development of its 1.4 nm technology had been started. Meanwhile, TSMC is set to host its Technology Symposium in mid-June and there the company may outline some brief details about the node that will succeed its N2 manufacturing process.
Standard process technology design flow includes pathfinding, research and development phases. Pathfinding involves things like fundamental exploration of materials and physics and in many cases, it is performed simultaneously for numerous nodes. By now, pathfinding for TSMC’s N2 has probably been concluded, so appropriate teams specializing in fundamental physics and chemistry are working on a successors for N2, which may well be called 1.4 nm, or 14 angstroms.
TSMC’s N2 relies on gate-all-around field-effect transistors (GAAFETs), but will use existing extreme ultraviolet (EUV) lithography with a 0.33 numerical aperture (0.33 NA). Given the details about TSMC’s N2 that we know today, it is possible that its successor will retain GAA transistors, but what really remains to be seen is whether it is going to move to EUV tools with a 0.55 NA (or High NA).
Keeping in mind that TSMC’s N2 enters HVM in late 2025 (so expect the first 2 nm chips from the company to be delivered around 2026) and TSMC’s two-and-a-half to three-year node introduction cadence, we can potentially expect TSMC’s 1.4 nm (or 14 angstroms) process to be used for commercial products starting in 2028. Given the timeframe, it will be beneficial for the node to use High NA lithography, which Intel plans to start using in 2025.
Speaking of Intel, it remains to be seen which of Intel’s node is set to compete against TSMC’s 1.4 nm. Intel is set to introduce its 18A (18 angstroms) technology in 2025, so by 2028 the company will roll out at least one new fabrication process. Whether it will be called 16A (since Intel seems to be cautious with node advancements these days) or 14A will be interesting to see.
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